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CS Talk Will we push on to an exaflop by 2020? What are the key problems? What are the potential solutions? In this talk, I’ll give a view from HP Labs, where we have pursued developments in hardware technology (photonic communication, memristor, 3D stacking), architecture (network topology, memory architecture), and software (power optimization, fault tolerance) that address the principal barriers to exaflop computing. Bio: Rob Schreiber is a Distinguished Technologist and Assistant Director of the Exascale Computing Lab at Hewlett Packard Laboratories. His research spans sequential and parallel algorithms for matrix computation, compiler optimization for parallel languages, and high performance computer design. With Moler and Gilbert, he developed the sparse matrix extension of Matlab and has continued to work with the MathWorks on parallel computation. He created the NAS CG parallel benchmark and was a designer of the High Performance Fortran language. At HP, Rob led the development of PICO, a system for synthesis of custom hardware accelerators. Rob’s recent work concerns architectural uses of CMOS nanophotonic communication and nonvolatile memory architecture. Other current projects include: graph clustering, role discovery for role-based access control, and applications of linear algebra to computer vision. Rob is an ACM Distinguished Scientist and a SIAM Fellow. In 2012, he
was awarded the Career Prize from the SIAM Activity Group in Supercomputing.
Rob received his Ph.D. in Computer Science in 1977 from Yale, where he
worked with Martin Schultz and Stan Eisenstat on finite element methods
for two-point boundary value problems.
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