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Internal |
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Yiorgos Makris
Associate Professor of Electrical Engineering & Computer Science
Dipl. Eng., University of Patras, Greece, 1995
M.S., Ph.D., University of California, San Diego, 1997, 2001
Joined Yale Faculty 2001
Personal Homepage
Yiorgos' main research interests lie in the application of machine learning
and statistical analysis towards developing reliable and trusted integrated
circuits, with particular emphasis in the analog/RF domain. He is also
investigating error detection and correction methods for modern microprocessors,
as well as novel computational modalities using emerging technologies.
His research activities have been supported by NSF, SRC, DARPA, Boeing,
IBM, LSI, Intel, and TI.
He is the program chair of the 2010 Test Technology Educational Program
(TTEP) and has served as a guest editor for the IEEE Transactions on Computers
and as a commitee member for several IEEE and ACM conferences. He is a
Senior Member of the IEEE and a recipient of the 2006 Sheffield Distinguished
Teaching Award.
| Representative Publications: |
 |
M. Maniatakos, N. Karimi,
C. Tirumurti, A. Jas, Y. Makris, “Instruction-Level Impact
Analysis of Low-Level Errors in a Modern Microprocessor Controller,”
IEEE Transactions on Computers (TCOMP), 2010 (to appear) |
|
Y. Jin, Y. Makris, “Hardware
Trojans in Wireless Cryptographic Integrated Circuits,” IEEE
Design & Test of Computers (D&T), vol. 27, no. 1, pp. 26-35,
2010 |
|
S. Almukhaizim, F. Shi,
E. Love, Y. Makris, “Soft Error Tolerance and Mitigation in
Asynchronous Burst Mode Circuits,” IEEE Transactions on Very
Large Scale Integration (T.VLSI), vol. 17, no. 7, pp. 869-882, 2009 |
|
F. Shi, Y. Makris, “Enhancing
Simulation Accuracy through Advanced Hazard Detection in Asynchronous
Circuits,” IEEE Transactions on Computers (T.COMP), vol. 58,
no. 3, pp. 394-408, 2009 |
|
H-G. D. Stratigopoulos, Y. Makris,
“Error Moderation in Low-Cost Machine Learning-Based Analog/RF
Testing,” IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems (T. CAD), vol. 27, no. 2, pp. 339-351, 2008 |
|
H-G. D. Stratigopoulos, Y. Makris,
“An Adaptive Checker for the Fully Differential Analog Code,”
IEEE Journal of Solid-State Circuits (JSSC), vol. 41, no. 6, pp.
1421-1429, 2006 |
|
H-G. D. Stratigopoulos, Y. Makris,
“Concurrent Error Detection in Linear Analog Circuits,”
IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems (T. CAD), vol. 25, no. 5, pp. 878-891, 2006 |
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