Intelligent Systems for Security and Extreme-Efficiency

My primary research area is Computer Architecture and Systems. Since I use formal control for system-level security and efficiency, my work intersects significantly with Security, Robust Control, Machine Learning, Datacenters/Cloud, Mobile systems, Energy and Power, Operating Systems and Compilers.

Computers across the spectrum - smartphones, cyber-physical systems to datacenters - are being pushed to work with severe resource constraints and highly dynamic applications. They must intelligently respond to changing conditions and deliver system-wide requirements of Quality of Service (QoS), power, security and many others. This is a hard problem and its difficulty worsens when we consider how systems are built. Computers are built with many subsystems that are independently sourced from many vendors. Such subsystems could be the different layers in the computing stack (e.g., hardware, OS and network), the heterogeneous processors in the hardware (e.g., CPU, GPU and accelerators), or the nodes of a distributed system. When designing a subsystem, the computer configurations that it will be part of is not always known. This creates a tension between the need to globally coordinate the subsystems and the need to keep decision-making local to each subsystem for fast response and modular design.

In this environment, researchers cannot confine their attention to components in isolation and instead, develop intelligent and composable architectures. Unfortunately, the prevailing trend of building systems with heuristics fails miserably at this ideal. My approach is to apply formal techniques (e.g., Control Theory and Machine Learning) for modular, fast and globally coordinated systems that deliver extreme-efficiency and security. I believe that system design is best evaluated with system building. Therefore, I take my ideas to the real-world to validate them, and identify the fundamental and practical issues hampering computer efficiency. I prototyped my dissertation work on multiple systems and even worked with AMD (Advanced Micro Devices, Inc.) to influence mainstream heterogeneous computer design.

I am co-organizing a tutorial on combining machine learning and control theory for architectures at MICRO'19 in Columbus, Ohio. Please register here.

Overview of my Dissertation

I proposed the use of MIMO (Multiple Input Multiple Output) formal control to manage many goals in a processor simultaneously. Then, I used Robust control to design modular controllers for multiple layers in the computing stack. Despite being independently designed, the controllers communicate and coordinate. Next, I worked on the challenge of managing heterogeneous computers integrated from multi-vendor subsystems. I collaborated with AMD to design a hierarchical control network that provides fast, globally coordinated and modular control of heterogeneous machines. Later, I developed an easy to implement defense against power sidechannels by re-shaping a computer's power using robust control. Now, I am applying reinforcement learning and robust control to effectively manage distributed systems. My work has brought formal control closer to computer systems.

Grant Writing

1. [Approved] NSF Award #1763658, Amount $1,200,00
   CSR: Medium: Effective Control to Maximize Resource Efficiency in Large Clusters; Hardware, Runtime, and Compiler Perspectives
   PIs: Josep Torrellas, Laxmikant Kale, David Padua at UIUC, 2018
2. [Approved] NSF Award #1725734, Amount $500,000
   SPX: Secure, Highly-Parallel Training of Deep Neural Networks in the Cloud Using General-Purpose Shared-Memory Platforms
   PIs: Josep Torrellas, Christopher Fletcher at UIUC, 2017

Publications and Patents

Google Scholar

1. [CGO '22] Distill: Domain-Specific Compilation for Cognitive Models [pdf]
   Ján Veselý*, Raghavendra Pradyumna Pothukuchi*, Ketaki Joshi, Samyak Gupta, Jonathan D. Cohen, Abhishek Bhattacharjee
   * Joint first author
   Artifact available
2. [ISCA '21] Maya: Using Formal Control to Obfuscate Power Side Channels [pdf]
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros Voulgaris, Alexander Schwing, Josep Torrellas
   Prototypes: 4-core Intel Haswell, 6-core and 2-socket 20-core Intel Sandybridge servers running Linux
   IEEE Micro Top Picks in Computer Architecture 2021
3. [Tech Report] Designing a Robust Controller for Obfuscating a Computer’s Power [pdf]
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas
   Technical Report, UIUC, June 2021.
4. [IEEE CSM '20] Control Systems for Computer Systems: Making computers efficient with modular, coordinated and robust control
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros Voulgaris, Josep Torrellas
   IEEE Control Systems, April, 2020. [6.228 Impact factor]
   Cover feature [View cover]
5. [MICRO '19] Tangram: Integrated Control of Heterogeneous Computers [pdf]
   Raghavendra Pradyumna Pothukuchi, Joseph Greathouse, Karthik Rao, Leonardo Piga, Christopher Erb, Petros Voulgaris, Josep Torrellas
   International Symposium on Microarchitecture (MICRO), October 2019. [23% acceptance]
   Prototype: Multisocket node with 2 AMD Ryzen CPUs and Radeon Vega GPU running Linux
6. [CDC '18] Modular Computer Resource Management with Multiple Structured Singular Value Controllers [pdf]
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros Voulgaris, Josep Torrellas
   Conference on Decision and Control (CDC), December 2018.
   
7. [ISCA '18] Multilayer Resource Controllers to Maximize Efficiency [pdf]
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros Voulgaris, Josep Torrellas
   International Symposium on Computer Architecture (ISCA), June 2018. [17% acceptance]
   Prototype: Odroid XU3 board with Samsung Exynos big.LITTLE processor running Linux
8. [US Patent] Distributed Multi-Input Multi-Output Control Theoretic Method to Manage Heterogeneous Systems
   Raghavendra Pradyumna Pothukuchi, Joseph Greathouse, Leonardo Piga
   U.S. Patent Application No. 15/950,172, April 2018.
   
9. [PACT'17] Sthira: Systematically Controlling the Error Rates in Variation-Prone Networks-on-Chip for Energy Efficiency [pdf]
   Raghavendra Pradyumna Pothukuchi, Amin Ansari, Bhargava Gopireddy, Josep Torrellas
   International conference on Parallel Architectures and Compilation Techniques (PACT), September 2017. [23% acceptance]
   Best Paper Nominee
10. [ISCA '16] Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures [pdf]
    Raghavendra Pradyumna Pothukuchi, Amin Ansari, Petros Voulgaris, Josep Torrellas
    International Symposium on Computer Architecture (ISCA), June 2016. [20% acceptance]
    3rd winner, IEEE Computer Society Lance Stafford Larson Paper Award
11. [Tech Report] A Guide to Design MIMO Controllers for Architectures [pdf]
    Raghavendra Pradyumna Pothukuchi, Josep Torrellas
    Technical Report, UIUC, April 2016.

Posters and Poster Papers

1. [PACT'17] Multilayer Compute Resource Management with Robust Control Theory [pdf]
   Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros Voulgaris, Josep Torrellas
   International conference on Parallel Architectures and Compilation Techniques (PACT), September 2017.
   Winner, ACM Student Research Competition
2. [AICERA '12] Remote Experimentation of “No-load Tests on a Transformer” in Electrical Engineering [pdf]
   Pradyumna P.R., Tarun C.K.S., Bhanot, S.
   IEEE International Conference on Engineering Education: Innovative Practices and Future Trends (AICERA), July 2012.