ABHISHEK BHATTACHARJEE
Yale University
he, him, his
abhishek [at] cs.yale.edu
- PhD ALUMNI
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Zi Yan, PhD '19
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NVIDIA -
Guilherme Cox, PhD '18
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NVIDIA -
Binh Pham, PhD '15
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Intel
I am an Associate Professor at Yale University. My research group studies computer architectures and operating systems for platforms ranging from data center servers to implantable brain computer interfaces. We are part of the Computer Systems Lab, and I am a Fellow of Grace Hopper College.
Hardware architectures have become highly heterogeneous, offering significant performance, but their domain specialization hampers wide accessibility to software developers. We build systems abstractions to improve programmability, and build chips, operating systems, and compilers along the way.
We have worked on the virtual memory abstraction, with contributions to translation contiguity, memory transistency, and GPU address translation. Our work on coalesced TLBs has been integrated in AMD's chips, and our large page optimizations are now in Linux. We have also worked on the system call abstraction by giving GPUs direct access to storage, networking, and memory management. Our results have influenced Radeon Open Compute's hyperscale computing stack.
More recently, we have also been building systems to help treat neurological disorders and advance the brain sciences. Our contributions include HALO, a flexible architecture for brain-computer interfaces.
Before Yale CS, I was an Associate Professor at Rutgers CS, and a visiting CV Starr Fellow at Princeton's Neuroscience Institute. Even before that, I was a PhD student at Princeton, an undergraduate student at McGill, and grew up in NYC, India, Italy, Malta, Myanmar, and Bangladesh. Along the way, I've been hanging out with someone who prefers real architecture.
teaching & research
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Technical Monographs
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PDFArchitectural and Operating System Support for Virtual Memory
Synthesis lecture monograph on introductory and more advanced virtual memory concepts
We will work on a revision soon, so please share your suggested improvements -
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Advanced Concepts on Address Translation
Appendix L in "Computer Architecture: A Quantitative Approach" by Hennessy and Patterson
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PDFHardware-Software Co-Design for Brain-Computer Interfaces, ISCA '20
HALO is a general-purpose brain implant chip for treating neurological disorders and studying the brain
Check out a layout diagram of our HALO chip tape-out -
PDFTranslation Ranger: Operating System Support for Contiguity-Aware TLBs, ISCA '19
Check out our kernel here
Check out the status of our Linux patchsetPDFNimble Page Management for Tiered Memory Systems, ASPLOS '19
Native transparent hugepage migration has been integrated into the Linux kernel
Our experimental kernel is available herePDFGeneric System Calls for GPUs, ISCA '18
Honorable mention, IEEE Micro's Top Picks in Computer Architecture
Released under the Radeon Open Compute project for ultrascale computingPDFPDFUsing Branch Predictors to Predict Brain Activity in Brain-Machine Implants, MICRO '17
Honorable mention, IEEE Micro's Top Picks in Computer ArchitecturePDFTranslation-Triggered Prefetching, ASPLOS '17
Best paper award nominee
IEEE Micro's Top Picks in Computer ArchitecturePDFLarge Pages and Lightweight Memory Management in Virtualized Environments: Can You Have it Both Ways?, MICRO '15
Best paper award nomineePDFArchitectural Support for Address Translation on GPUs, ASPLOS '14
IEEE Micro's Top Picks in Computer Architecture
Teaching
INFOCPSC 323: Introduction to Systems Programming and Computer Organization
Spring '20, Spring '21INFOCPSC 436/536: The Hardware/Software Interface
Fall '19INFOCPSC 622: Advanced Operating Systems
Spring '21INFOCPSC 635: Topics on the Hardware/Software Interface
Spring '19
Selected Research
