Abhishek Bhattacharjee

Associate Professor of Computer Science

Yale University


he, him, his

abhishek [at] cs.yale.edu

I am an Associate Professor of Computer Science at Yale University. My group studies computer architectures and systems for platforms ranging from data center servers to brain-computer interfaces and quantum computers. I am part of Yale's Computer Systems Lab and Interdepartmental Neuroscience Program, and am also a Fellow of Grace Hopper College.

Modern computer systems integrate diverse accelerators and memory technologies, offering significant performance but complicating the programming models that software developers are familiar with. We build systems abstractions to improve hardware programmability, and architect hardware and systems software support to implement these abstractions efficiently.

We have worked on the virtual memory abstraction with contributions to translation contiguity, memory transistency, and GPU address translation. Our work on coalesced TLBs has been integrated into AMD's chips, and our large page optimizations are now in Linux. Our work on giving GPUs direct access to storage, networking, and memory management services has influenced Radeon Open Compute's hyperscale computing stack.

We have also been building heterogeneous architectures that advance the brain sciences to help treat neurological disorders and offer a path towards more explainable and transparent AI. In our HALO project, we are taping out ultra-low-power and flexible chips for brain-computer interfaces and evaluating them using data collected on non-human primates and epilepsy patients.

Before Yale CS, I was an Associate Professor at Rutgers CS and a visiting CV Starr Fellow at Princeton's Neuroscience Institute. Even before that, I was a PhD student at Princeton and an undergraduate student at McGill.

teaching & research

    Selected Research Papers

  • PDF
    KLOCs: Kernel-Level Object Contexts for Heterogeneous Memory Systems, ASPLOS '21
    Check out our experimental kernel here
  • PDF
    Mirage: An Illusion of Fast Local Page-Tables for Virtualized NUMA Systems, ASPLOS '21
    Check out our experimental kernel here
  • PDF
    Hardware-Software Co-Design for Brain-Computer Interfaces, ISCA '20
    IEEE Micro's Top Picks in Computer Architecture
    Check out a layout diagram of our HALO chip tape-out
  • PDF
    Translation Ranger: Operating System Support for Contiguity-Aware TLBs, ISCA '19
    Check out our kernel here
    Check out the status of our Linux patchset
  • PDF
    Nimble Page Management for Tiered Memory Systems, ASPLOS '19
    Native transparent hugepage migration has been integrated into the Linux kernel
    Our experimental kernel is available here
  • PDF
    Generic System Calls for GPUs, ISCA '18
    Honorable mention, IEEE Micro's Top Picks in Computer Architecture
    Released under the Radeon Open Compute project for ultrascale computing
  • PDF
    COATCheck: Verifying Memory Ordering at the Hardware-OS Interface, ASPLOS '16
    IEEE Micro's Top Picks in Computer Architecture
    Our COATCheck tool is available here
  • PDF
    Architectural Support for Address Translation on GPUs, ASPLOS '14
    IEEE Micro's Top Picks in Computer Architecture
  • PDF
    CoLT: Coalesced Large-Reach TLBs, MICRO '12
    Integrated in AMD chips, beginning with the Zen architecture
    • Technical Monographs

  • PDF
    Architectural and Operating System Support for Virtual Memory
    Synthesis lecture monograph on introductory and more advanced virtual memory concepts
    We will work on a revision soon, so please share your suggested improvements
  • PDF
    Advanced Concepts on Address Translation

    Appendix L in "Computer Architecture: A Quantitative Approach" by Hennessy and Patterson

    • Current Teaching Interests

  • INFO
    CPSC 323: Introduction to Systems Programming and Computer Organization
    Spring '20, Spring '21
  • INFO
    CPSC 622: Advanced Operating Systems
    Spring '21